Semiconductor circuit

ABSTRACT

An operational command signal is output to one of an amplifier or a variable damper depending on the signal level of a high frequency signal.

This application is the national phase under 35 U.S.C. §371 of PCTInternational Application No. PCT/JP98/02137 which has an Internationalfiling date of May 14, 1998 which designated the United States ofAmerica.

FIELD OF THE INVENTION

The present invention relates to a semiconductor circuit which amplifiesand damps a high frequency band signal such as UHF, a microwave or amillimeter wave.

BACKGROUND TO THE INVENTION

FIG. 1 shows a conventional semiconductor circuit as disclosed forexample in JP-A-62-23629. In the figure, reference numeral 1 denotes aninput terminal which inputs a high frequency signal, 2 is a bias controlcircuit which supplies a bias current to a variable damper 3 when asignal level of a high frequency signal is higher than a referencelevel, 3 is a variable damper which damps a high frequency signal when abias current is received from the bias control circuit 2, 4 is anamplifier which amplifies a high frequency signal damped by the variabledamper 3 and 5 is an output terminal which outputs a high frequencysignal amplified by the amplifier 4.

The operation of the invention will be outlined below.

Firstly, when a semiconductor circuit is used for signal reception,reception characteristics can deteriorate as a result of the variabledamper 3 damping high frequency signals when the signal level of thehigh frequency signal input from the input terminal 1 is low.

On the other hand, if however damping of the high frequency signal bythe variable damper 3 is terminated, the amplifier 4 may be saturated asthe signal level of the high frequency signal is high.

In the above conventional example, when a high frequency signal is inputfrom the input terminal 1, the bias control circuit 2 compares thesignal level of the high frequency signal with a reference level. Whenthe signal level of the high frequency signal is lower than thereference level, supply of the bias current to the variable damper 3 isterminated and the attenuation of the variable damper 3 is set to 0 dB.

In this way, reception characteristics may be improved by amplifying thesignal level of the high frequency signal since a high frequency signalis output to the amplifier 4 without being damped by the damper 3.

Furthermore the bias control circuit 2 supplies a bias current to thevariable damper 3 when the signal level of the high frequency signal ishigher than the reference level and the attenuation of the variabledamper 3 is set to XdB.

In this way, saturation of the amplifier 4 may be avoided because a highfrequency signal is output to the amplifier 4 after the signal level ofthe high frequency signal is damped by the variable damper 3 with anattenuation of XdB. However in this case, although the S/N ratio bywhich the variable damper 4 damps the high frequency signal deterioratesto some degree, a S/N ratio required for reception is maintained sincethe signal level is high enough to saturate the amplifier 4.

When the attenuation of the variable damper 3 is set to 0 dB, as statedabove, the variable damper 3 does not damp high frequency signals and ahigh frequency signal is output to the amplifier 4. When a highfrequency signal is output to the variable amplifier 3, receptioncharacteristics deteriorate and the amplifier 4 increases receptionnoise due to a certain degree of insertion loss.

In such a case, as shown in FIG. 2, it is possible to eliminatedeterioration of reception characteristics by disposing the variabledamper 3 on the output side of the amplifier 4. However such anarrangement will not allow saturation of the amplifier 4 to be avoided.

Since a conventional semiconductor circuit is constructed as above, whenthe variable damper 3 is disposed on the input side of the amplifier 4,it is possible to prevent saturation of the amplifier 4. However whenthe signal level of the high frequency signal is lower than a referencelevel, reception characteristics deteriorate due to insertion loss. Whenthe variable damper 3 is disposed on the output side of the amplifier 4,it is possible to prevent deterioration of reception characteristics.However in this case, saturation of the amplifier 4 can not be avoided.

The present invention is proposed to solve the above problems and hasthe object of providing a semiconductor circuit which can preventdeterioration of reception characteristics and which can preventsaturation of an amplifier.

DISCLOSURE OF THE INVENTION

The semiconductor circuit of the present invention is adapted togenerate an operation permission command to one of an amplifying meansor a damping means in response to the signal level of an input signal.

In this way, when the signal level of the input signal is high, it ispossible to prevent saturation of the amplifying means and when thesignal level of the input signal is low, it is possible to preventdeterioration of reception characteristics by avoiding increases inreception noise.

When used for transmission, a power source of the amplifying means canbe cut off when the output transmission is reduced. Thus it is possibleto reduce power consumption.

The semiconductor circuit of the present invention is adapted to connectin direct series an amplifier which amplifies an input signal with aswitch. The switch is placed in a short circuit state when receiving anoperation permission command and is placed in an open state when notreceiving an operation permission command.

In such a way, when the signal level of an input signal is higher than areference level, it is possible to isolate the amplifier from thecircuit.

The semiconductor circuit of the present invention is adapted to connectin series a damper which damps an input signal with a switch. The switchis placed in a short circuit state when receiving an operationpermission command and is placed in an open state when not receiving anoperation permission command.

In such a way, when the signal level of an input signal is lower than areference level, it is possible to isolate the damper from the circuit.

The semiconductor circuit of the present invention is adapted to connecta switching semiconductor terminal to the output and input sides of thedamper.

In such a way, when the signal level of an input signal is lower than areference level, it is possible to isolate the damper from the circuit.

The semiconductor circuit of the present invention is adapted so thatthe switching semiconductor terminal makes a transition to an open statewhen a transistor which comprises the amplifying means makes thetransition to a short circuit state. When the transistor makes thetransition to an open state, the switching semiconductor terminal makesthe transition to the short circuit state.

In such a way, when the signal level of an input signal is high, it ispossible to prevent saturation of the transistor and when the when thesignal level of an input signal is low, it is possible to preventdeterioration of the reception characteristics while avoiding increasesin reception noise.

The semiconductor circuit of the present invention is adapted to connecta matching circuit between the damper and the input side of theswitching semiconductor terminal and to connect a matching circuitbetween the damper and the output side of the switching semiconductorterminal.

In this way, it is possible to reduce input/output reflection loss whenoperating the damper.

The semiconductor circuit of the present invention comprises a dampingmeans using a variable damper adapted to regulate attenuation.

In this way, it is possible to regulate a signal level of a highfrequency signal output from the amplifier and as a result, it ispossible to prevent saturation of the amplifier while maintainingreception characteristics of the receiver even when the dynamic range ofthe receiver connected to the output terminal is narrow.

The semiconductor circuit of the present invention comprises a dampingmeans using a series circuit of a circuit terminal and a switchingsemiconductor terminal.

In this way, when the signal level of the input signal is lower than areference level, damping of the high frequency signal is terminated.When the signal level of the input signal is higher than a referencelevel, damping of the high frequency signal is performed.

The semiconductor circuit of the present invention is adapted to controla switching semiconductor terminal while maintaining the operationalstate of the amplifier.

In this way, when the signal level of the input signal is higher than areference level, it is possible to amplify a high frequency signal andwhen the signal level of the input signal is lower than a referencelevel, it is possible to prevent saturation by depressing the gain ofthe amplifier.

The semiconductor circuit of the present invention comprises a dampingmeans which uses a T-type damper with a switching semiconductor terminalconnected to the input side.

In this way, it is possible to eliminate the output-side switchingsemiconductor terminal and operate the T-type damper as a stable circuiton the output side.

The semiconductor circuit of the present invention comprises a dampingmeans which uses a π-type damper with a switching semiconductor terminalconnected to the input side.

In this way, it is possible to eliminate the output-side switchingsemiconductor terminal and operate the π-type damper as a stable circuiton the output side.

The semiconductor circuit of the present invention is adapted to connecta condenser between an earth and an earthing terminal of a π-type or aT-type damper and to apply a direct current voltage to the outputterminal of the transistor which comprises the amplifier means from theearthing terminal.

In this way, it is possible to reduce the size of the circuit as aninductor for bias feed on the output side of the amplifier becomesunnecessary.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a conventional semiconductor circuit.

FIG. 2 shows a conventional semiconductor circuit.

FIG. 3 shows a semiconductor circuit according to a first embodiment ofthe present invention.

FIG. 4 shows a semiconductor circuit according to a second embodiment ofthe present invention.

FIG. 5 shows a semiconductor circuit according to a third embodiment ofthe present invention.

FIG. 6 shows a semiconductor circuit according to a fourth embodiment ofthe present invention.

FIG. 7 shows a semiconductor circuit according to a fourth embodiment ofthe present invention.

FIG. 8 shows a semiconductor circuit according to a fifth embodiment ofthe present invention.

FIG. 9 shows a semiconductor circuit according to a sixth embodiment ofthe present invention.

FIG. 10 shows a semiconductor circuit according to a seventh embodimentof the present invention.

FIG. 11 shows a semiconductor circuit according to an eighth embodimentof the present invention.

FIG. 12 shows a semiconductor circuit according to a ninth embodiment ofthe present invention.

FIG. 13 shows a semiconductor circuit according to a tenth embodiment ofthe present invention.

PREFERRED EMBODIMENTS OF THE INVENTION

In order to describe the invention in greater detail, the preferredembodiments will be outlined below with reference to the accompanyingfigures.

Embodiment 1

FIG. 3 shows a semiconductor circuit according to a first embodiment ofthe present invention. In the figure, reference numeral 11 denotes aninput terminal which inputs a high frequency signal (input signal), 12(control means) is a bias control circuit which supplies a bias current(operation permission command) only to the variable damper 13 when thesignal level of the high frequency signal is higher than a referencelevel and which supplies a bias current (operation permission command)only to the amplifier 14 when the signal level of the high frequencysignal is lower than a reference level. 13 is a variable damper (dampingmeans) which damps a high frequency signal when a bias current issupplied from the bias control circuit 12. 14 is an amplifier(amplifying means) which amplifies a high frequency signal when a biascurrent is supplied from the bias control circuit 12. 15 is an outputterminal which outputs an amplified or damped high frequency signal.

The operation of the invention will be described below.

Firstly, when a semiconductor circuit is used for signal reception,reception characteristics can deteriorate as a result of the variabledamper 13 damping a high frequency signal when the signal level of thehigh frequency signal input from the input terminal 1 is low.

On the other hand, when the signal level of the high frequency signal ishigh, the amplifier 4 may be saturated as the amplifier 14 amplifies thehigh frequency signal.

In the first embodiment, when a high frequency signal is input from theinput terminal 11, the bias control circuit 12 compares the signal levelof the high frequency signal with a reference level. When the signallevel of the high frequency signal is lower than a reference level, abias current is supplied to the amplifier 14 and the supply of a biascurrent to the variable damper 13 is terminated.

While the variable damper 13 receives a bias current, the damperoperates on an attenuation of XdB. However when the supply of the biascurrent is terminated, the variable damper 13 is isolated from thecircuit as an internal switch (not shown) is placed in the openposition.

In this way, the circuit as shown in FIG. 3, allows signal level to beamplified and reception characteristics to be improved without dampingthe high frequency signal as the circuit is equivalent to a circuitcomprising only the amplifier 14.

In this case, in contrast to the conventional example, it is possible toavoid insertion loss in the circuit accompanying the input of the highfrequency signal since the variable damper 13 is isolated from thecircuit.

On the other hand, the bias control circuit 12 supplies a bias currentto the variable damper 13 when the signal level of the high frequencysignal is higher than a reference level and terminates supply of thebias current to the amplifier 14.

While the amplifier 14 is receiving a bias current, the high frequencysignal is amplified. However when the supply of the bias current isterminated, the amplifier is isolated from the circuit as an internalswitch (not shown) is in the open condition.

In such a way, the circuit shown in FIG. 3 can prevent saturation of theamplifier 14 as the circuit is equivalent to a circuit comprising onlythe variable damper 13 alone is equivalent to the existing circuit.

However in this case, the S/N ratio is somewhat deteriorated as thevariable damper 13 damps the high frequency signal. However a S/N ratiorequired for reception is maintained since the signal level is highenough to saturate the amplifier 14.

As is clear from the above, according to embodiment 1, the invention isadapted to supply a bias current to one of an amplifier 14 or a variabledamper 13 depending on the signal level of a high frequency signal. Thusit is possible to prevent saturation of the amplifier 14 and to preventdeterioration of reception characteristics.

Embodiment 1 was described as using the semiconductor circuit for signalreception. However it is possible to use the circuit for signaltransmission.

In this case, since loss in the output side of the amplifier 14 is low,reductions in output power are also low. Furthermore when output poweris reduced, it is possible to reduce the direct current which isconsumed during signal transmission.

Furthermore in embodiment 1, the number of stages of the amplifier hasnot been discussed. However the amplifier may be a one-stage amplifieror may have two stages or more. For example, the amplifier may be aplurality of amplifiers in series (a balance amplifier) connected inparallel.

In this context, it is noted that the impedance of the variable damper13 on the permitted side need not always be open when loss increase ofthe one of the circuits in the input/output circuit of the amplifier 14is permitted. However it is necessary for the impedance of the variabledamper 13 on the loss allowed side to be open.

Embodiment 2

FIG. 4 shows a semiconductor circuit according to a second embodiment ofthe present invention. In the figure, those components which are thesame or similar to those of FIG. 3 are designated by the same referencenumerals and will not be described further.

Reference numerals 16 and 17 denote a switch which is in a short circuitstate when a bias current is applied from the bias control circuit 12and is in an open state when a bias current is not supplied from thebias control circuit 12. 18 is a T-type damper which damps highfrequency signals.

The operation of the invention will be described below.

The basic operation is the same as that described in embodiment 1.However in embodiment 2, the T-type damper 18 damps high frequencysignals when a bias current is supplied from the bias control circuit 12since the switches 16, 17 are in the short circuit state.

On the other hand, the T-type damper 18 is isolated from the circuit anddamping of the high frequency signal is terminated when a bias currentis not supplied from the bias control circuit 12 as the switches 16, 17are in an open state.

The operation of the amplifier 14 is the same as that described inembodiment 1 and further description will be omitted.

Embodiment 3

FIG. 5 shows a semiconductor circuit according to a third embodiment ofthe present invention. In the figure, those components which are thesame or similar to those of FIG. 4 are designated by the same referencenumerals and will not be described further.

Reference numeral 19 denotes a bias resistor of a switch (switchingsemiconductor terminal) 16, 20 is a switching FET of a switch 16 whichvaries the state of the connection depending on variations in a gatevoltage, 21 is a bias resistor of a switch (switching semiconductorterminal) 17, 22 is a switching FET of a switch 17 which varies thestate of the connection depending on variations in a gate voltage, 23-25denote feed bias inductors, 26 is an amplifier FET (transistor), 27 is amatching circuit which combines the impedance of the amplifier 14 withan input impedance, 28 is a matching circuit which combines theimpedance of the amplifier 14 with the output impedance, 29, 30 arecondensers for cutting DC current and 31 is a self-biasing resistor.

The operation of the invention will be described below.

Firstly, the gate voltage of the amplifier FET 26 is set to 0V by thebias feed inductor 23. The source voltage of the amplifier FET 26 is setto a positive voltage by the current which flows in the self-biasingresistor 31.

Therefore when a positive voltage is applied to the drain terminal ofthe amplifier FET 26 through the bias-feed inductor 24, the amplifierFET 26 initiates amplifier operation of the high amplitude signal.

On the other hand, when the drain voltage of the amplifier FET 26 is setto 0V, a current does not flow in the amplifier FET 26, the impedance ofthe amplifier FET 26 becomes limitlessly large and the amplifier FET 26is equivalent to a state of being isolated from the circuit.

In this way, it is possible to achieve the same effect as embodiment 1above. In the input/output circuit of the amplifier 14, when lossincrease of one of the circuits is permitted, it is not necessary forthe impedance of the variable damper 13 on the side on which loss ispermitted to be always open. In this case, one of the switches 16, 17may be omitted. However since the impedance of the variable damper 13 onthe side on which loss is not permitted must always be open, the otherswitch can not be omitted.

Although a T-type damper 18 was used as a damper in the embodimentabove, a damper with another structure (for example a π-type damper) maybe used in order to achieve the same effect.

Although a series FET was used in switches 16, 17 in the aboveembodiment, other circuit layouts such as series-parallel layouts may beused. The same effect can also be achieved by use of a switching deviceother than a FET such as a pin diode.

Embodiment 4

In embodiment 3 above, a variable damper 13 was described as beingconnected with the input/output terminal of the amplifier 14. However asshown in FIG. 6, a variable damper 13 may be connected with the gatedrain of the amplifier FET 26.

That is to say, when a variable damper 13 is connected with theinput/output terminal of the amplifier 14, the circuit dimensions of thematching circuits 27, 28 of the amplifier 14 are difficult to apply toan integrated circuit since they are large in comparison with thevariable damper 13 and the bias circuit of the amplifier FET 26.Furthermore when the frequency of the input signal is high, it isdifficult to consider that the input/output impedance of the amplifier14 is open when the amplifier is not in operation.

In contrast, when a variable damper 13 is connected with the gate drainof the amplifier FET 26, the circuit dimensions can easily be applied toan integrated circuit as it is possible to make the matching circuits27, 28 circuits on the outside of the IC.

In comparison with the amplifier 14, a single amplifier FET 26 canreduce the influence on the variable damper 13 when not in use since theimpedance when not in use is close to an open state.

However normally, the input/output impedance of the amplifier FET 26during operation is high in comparison with the input/output impedanceof the variable damper 13 or the amplifier 14. Thus the problem arisesthat the variable damper 13 can be easily affected when not inoperation.

When increase loss is permitted in one of the circuits in theinput/output circuit of the amplifier FET 26, it is not always necessaryfor the impedance of the variable damper 13 on the side on which loss ispermitted to be open. In such a case, it is possible to omit one of theswitches 16, 17. However since the impedance of the variable damper 13on the side on which loss is not permitted must always be open, theother switch can not be omitted.

As shown in FIG. 7, it is possible to achieve the same effect withrespect to one of the circuits in the input/output circuit of theamplifier FET 26 by connecting the variable damper 13 to the outer sideof the matching circuit.

Embodiment 5

FIG. 8 shows a semiconductor circuit according to a fifth embodiment ofthe present invention. In the figure, those components which are thesame or similar to those of FIG. 5 are designated by the same referencenumerals and will not be described further.

Reference numeral 32 denotes a π-type damper which damps a highfrequency signal, 33 is a matching circuit which combines the impedanceof the variable damper 13 with the input impedance, 34 is a matchingcircuit which combines the impedance of the variable damper 13 with theoutput impedance.

The operation of the invention will be described below.

The basic operation of the present embodiment is the same as thatdescribed above in embodiment 3. However in embodiment 5, the points ofdifference reside in the fact that a π-type damper 32 is connectedinstead of the T-type damper 18 and the matching circuits 33, 34 areconnected.

The substitution of a π-type damper 32 instead of the T-type damper 18has no effect on the characteristics or the operation. However whendealing with a high frequency, the input/output impedance of theamplifier 14 is sometimes can not be regarded as being in the open statewhen the amplifier 14 is in a non-operational state as the switches 16,17 are in a short circuit state (the variable damper 13 is operating).

Thus in embodiment 5, in order to avoid any effect of the amplifier 14,the impedance of the variable damper 13 is combined with the outputimpedance and the input/output reflection when the variable damper 13 isin operation is reduced by connecting the matching circuits 33, 34.

When the variable damper 13 is not in operation as the switches 16, 17are in an open state, there is no effect on the operation of theamplifier 14 as a result of the presence or absence of the matchingcircuits 33, 34.

Embodiment 6

FIG. 9 shows a semiconductor circuit according to a sixth embodiment ofthe present invention. In the figure, those components which are thesame or similar to those of FIG. 5 are designated by the same referencenumerals and will not be described further.

Reference numeral 35 denotes a bridged T-type variable damper withvariable attenuation.

The operation of the present embodiment will be described below.

In embodiment 3, the T-type damper 18 with a fixed attenuation XdB wasused. However embodiment 6 is different in that when the variable damper13 is in operation, a bridged T-type variable damper 35 is used whichcan regulate the level of attenuation.

In this way, it is possible to regulate the signal level of the highfrequency signal output from the output terminal 15. As a result, evenwhen the dynamic range of the receiver connected to the output terminal15 is narrow, reception characteristics of the receiver may bemaintained and it is possible to prevent saturation of the amplifier 14.

Although a bridged T-type variable damper 35 is used as a variabledamper 13 in the present embodiment, other types of variable dampers maybe used to achieve the same effect.

When a variable damper is used in which the attenuation is limitlesslylarge and the input/output impedance is open, it is possible to omit theswitches 16,17 connected to the input/output of the variable damper.When the input/output impedance is in a short circuit state, it is alsopossible to omit the switches 16, 17. However a line with a 1/4wavelength must be connected to consider that the impedance from theoutside is open.

Embodiment 7

In embodiment 3, the variable damper 13 was described using a switch 16or a T-type damper 18. However as shown in FIG. 10, it is possible tomake the variable damper 13 using only the switch 16.

That is to say, when the switch 16 is open, it is equivalent to acircuit comprised only of the amplifier 14 and when the switch 16 isshort circuited, the amplifier 14 isolated from the circuit and thecircuit is equivalent to a through circuit with a gain of 0 dB. In sucha situation, it is possible to prevent saturation of the receiverconnected in later stages.

When connected in series, the switch 16 is the only circuit terminalwhich is considered when a high frequency signal is input (the impedanceof the DC cutting condenser has a value of approximately zero when thefrequency is high). However other circuit terminals may also beconnected. For example, when a resistor is connected in series to theswitch 16, it is possible to regard it as a damper when the resistanceis sufficiently low in comparison with the input/output impedance.

Embodiment 8

FIG. 11 shows a semiconductor circuit according to an eighth embodimentof the present invention. In the figure, those components which are thesame or similar to those of FIG. 10 are designated by the same referencenumerals and will not be described further.

Reference numeral 36 denotes a feedback resistor of the amplifier FET26, 37 is a power source terminal.

The operation of the invention will be described below.

The basic operation is the same as that of embodiment 7. However thepoints of difference are that a feedback resistor 36 is connected to theoutput side of the switch 16 and a power source terminal 37 is connectedto the drain terminal of the amplifier FET 26.

That is to say, in embodiment 7, although the drain terminal of theamplifier FET 26 is supplied with power from the bias control circuit12, in embodiment 8, normal power supply is from a power source (notshown) which is connected to the power source terminal 39 and theamplifier FET 26 is maintained during normal operation.

When the switch 16 is open, the switch 16 is treated as an open circuitfrom the point of view of the input circuit of the amplifier 14.Furthermore although the feedback resistor 36 with an open end mayappear connected from the point of view of the output circuit of theamplifier 14, this is equivalent to a simple open circuit.

Thus in such a case, reception characteristics do not deteriorate asthis circuit is equivalent to a circuit comprising only the amplifier14.

When the switch 16 is short-circuited, the feedback resistor 36 is seenas connected with the gate drain of the amplifier FET 26.

Thus in such a case, since negative feedback is applied to the amplifierFET 26 by the feedback resistor 36 the gain of the amplifier 14 isreduced and saturation becomes unlikely.

Embodiment 9

In embodiment 3 above and the like, a switch 16 was connected to theinput side of the T-type damper 18 and a switch 17 is connected to theoutput side of the T-type damper 18. As shown in FIG. 12 however theswitch 17 may be eliminated.

That is to say, in embodiment 3 above and the like, a switch 17 which isconnected in parallel to the output circuit is adapted to be open sothat loss is not generated in the output circuit when the amplifier 14is operated.

However loss in the output circuit does not constitute a problem withrespect to reception characteristics when there is sufficient gain inthe amplifier 14.

Embodiment 9 is adapted to eliminate the switch 17. However when theswitch 17 is eliminated, although some loss is generated from the pointof view of the output side of the amplifier 14 as the T-type damper 18appears to be connected in parallel, this entails the advantage that thedimensions of the circuit may be reduced since the number of switches isreduced.

The T-type damper 18 which is connected in parallel to the outputcircuit of the amplifier 14 operates as a stable circuit on the outputside. In addition, it is possible to utilize a part of the circuit as amatching circuit. In embodiment 3 above, it is possible to furtherreduce the dimensions of the circuit as it is possible to eliminate thebias feed inductor 25 which is connected to the output terminal of theamplifier 14.

Embodiment 10

In embodiment 9, a variable damper 13 was constituted using a T-typedamper 18. However as shown in FIG. 13, it is possible to connect aπ-type damper 32 instead of the T-type damper 18, to connect a DCcutting condenser 38, 39 and to supply electricity through the π-typedamper 32 to the drain terminal of the amplifier FET 26.

In other words, positioning the T-type damper 18 in the π-type damper 32has no effect on the operation. However due to the variation in thesecircuits, the connecting terminal of the parallel resistor of the π-typedamper 32 with the DC cutting condenser 39 is earthed at highfrequencies and is directly connected to the drain terminal of theamplifier FET 26.

Thus according to embodiment 10, since power can be supplied to thedrain terminal of the amplifier FET 26 from the connection terminal, itis possible to eliminate the bias feed inductor 25 and reduce the sizeof the circuit.

Although a π-type damper 32 was used as a damper in this embodiment, aT-type damper will achieve the same effect.

It is possible to achieve the same effect with a π-type damper or T-typedamper or a bridged T-type damper.

Furthermore the same effect is obtained by connecting the π-type damper32 or the like to the gate drain of the amplifier FET 26 and not to theinput/output of the amplifier 14.

INDUSTRIAL APPLICATION

As shown above, a semiconductor circuit of the present invention is usedeffectively in a system in which the signal level of a received highfrequency signal undergoes large variation as in the case of mobilecommunications.

The present invention is particularly effective in avoiding the problemof non-linearity of the amplifier in a system in which linearity of highfrequency signals is important.

What is claimed is:
 1. A semiconductor circuit provided with anamplifier which amplifies an input signal on receipt of an operationpermission command, a damper which is connected in parallel with saidamplifier and which damps an input signal on receipt of an operationpermission command, and a control which transmits an operationpermission command to one of said amplifier or said damper depending onthe signal level of an input signal.
 2. A semiconductor circuitaccording to claim 1 wherein said amplifier comprises an amplifier whichamplifies an input signal and a switch which is connected in parallelwith said amplifier, which is in a short circuit state when receiving anoperation permission command and which is in an open state when notreceiving an operation permission command.
 3. A semiconductor circuitaccording to claim 1 wherein said damper comprises an damper which dampsan input signal and a switch which is connected in parallel with saiddamper, which is in a short circuit state when receiving an operationpermission command and which is in an open state when not receiving anoperation permission command.
 4. A semiconductor circuit according toclaim 3 wherein a switching semiconductor terminal is connected to theinput and output sides of said damper.
 5. A semiconductor circuitaccording to claim 4 wherein said amplifier is comprised by atransistor, and said control makes said switching semiconductor circuitmake a transition to an open state when said transistor is in a shortcircuit state and makes said switching semiconductor circuit make atransition to a short circuit state when said transistor is in an openstate.
 6. A semiconductor circuit according to claim 4 wherein amatching circuit is connected between said damper and an input side ofsaid switching semiconductor circuit and a matching circuit is connectedbetween said damper and an output side of said switching semiconductorcircuit.
 7. A semiconductor circuit according to claim 1 wherein saiddamper is comprised of a variable damper which regulates a level ofattenuation.
 8. A semiconductor circuit according to claim 1 whereinsaid damper is comprised using said switching semiconductor terminal anda series circuit of a circuit terminal.
 9. A semiconductor circuitaccording to claim 8 wherein said control controls said switchingsemiconductor terminal while an operational state of said amplifier ismaintained.
 10. A semiconductor circuit according to claim 3 whereinsaid damper is comprised using a T-type damper with said switchingsemiconductor terminal connected to an input side.
 11. A semiconductorcircuit according to claim 3 wherein said damper uses a π-type damperwith said switching semiconductor terminal connected to an input side.12. A semiconductor circuit according to claim 10 wherein a condenser isconnected between the earth and earthing terminal of said T-type damperand a direct current voltage is applied to an output terminal of saidtransistor comprising said amplifier from said earthing terminal.